Key Takeaways:
- Power—not compute — is emerging as the primary in AI infrastructure
- Traditional VRMs remain essential but are no longer sufficient on their own.
- Package IVRs are the near-term performance enabler.
- Embedded IVRs represent the long-term architectural direction
- The future is hybrid, not binary.
Artificial intelligence infrastructure is entering a buildout phase measured not in millions, but in potentially trillions of dollars. As capital pours into AI factories, hyperscale data centers, and accelerated computing platforms, one constraint is becoming impossible to ignore: power. Data center demand is projected to accelerate by as much as 175 percent by 2030, effectively adding the equivalent of another top 10 power-consuming nation to the grid.
This surge is forcing a fundamental rethink of how power is delivered. Modern processors xPU [including graphics processing units (GPUs), tensor processing units (TPUs), neural processing units (NPUs), central processing units (CPUs)] and accelerators are pushing architectures to their limits, driving the need for more efficient, high-density power delivery models. To meet the performance and scalability demands of next-generation AI systems, designers should evaluate three distinct approaches to how power is delivered: VRMs, Package IVRs, and Embedded IVRs.
Traditional VRMs: Proven, Flexible, and Increasingly Stretched
Traditional voltage regulator modules, or VRMs, remain widely used in many high-performance systems. These are board-level, multiphase buck converters that step 12V input power down to the sub-1V rails required by central processing units (CPUs), GPUs, and custom AI accelerators. Their appeal is easy to understand: They are flexible, relatively serviceable, easier to cool than tightly integrated alternatives, and backed by a mature design ecosystem.
For engineering teams, traditional VRMs offer a familiar and comparatively low-risk path. The problem is that AI power profiles are pushing board-level architectures to their limits. As accelerators draw more current at lower voltages, losses in printed circuit board (PCB) routing become harder to tolerate. Parasitic inductance degrades response, and the electrical distance between regulator and die makes it more difficult to keep voltage stable during the sharp load steps common in AI inference and training workloads.
Current density for advanced board-level AI VRMs is often cited in roughly the ~0.5–2 A/mm² range, which is increasingly modest relative to what next-generation accelerators need. That is why traditional VRMs are likely to remain important, but increasingly as part of a broader hybrid architecture rather than the sole solution.
Package IVRs: Bringing Regulation to the Point of Load
Package integrated voltage regulators (IVRs) move voltage regulation into, under, or directly adjacent to the processor package. That drastically shortens the final electrical path to the die, which is what processors (xPU, application-specific integrated circuit (ASIC), system on a chip (SoC), etc) running AI need as current rises and voltage margins tighten. The closer the regulator is to the point of load, the lower the parasitic losses, and the faster the system can respond to abrupt current swings.
This is why package IVRs are gaining momentum. They offer some of the best transient response available, reduce distribution loss in the last stage of delivery, shrink motherboard footprint, and support much higher power density than conventional board-level VRMs. Current density targets for Package IVRs are approximately in the 3.5–4 A/mm² range.
The value proposition here is straightforward: Package IVRs improve the power delivery network where it matters most. But the central challenge in this case is thermal concentration. When regulator heat is brought into the same physical neighborhood as the compute die, thermal design becomes far more complex. The industry response increasingly includes backside placement, advanced package design, and liquid cooling strategies that separate or more efficiently extract heat from dense compute zones. This is one reason package IVRs are compelling as newer packaging and heating are mass produced and become more readily available over the next 12 to 18 months.
Embedded IVRs: The Most Ambitious Path
Embedded IVRs represent a deeper level of integration. Instead of sitting only on the board or simply next to the processor package, power delivery elements are embedded into the substrate, interposer, module, or other co-packaged structures. This approach aligns closely with the broader industry shift toward near-die and vertical power delivery, especially as AI systems cross the kilowatt threshold and demand ever-higher current density.
The attraction is significant. Embedded IVRs promise better transient response than traditional VRMs, substantially reduced parasitic, and much higher power density. Depending on implementation, they may also deliver efficiency advantages by shortening current paths and enabling more vertically optimized architectures. Industry roadmaps increasingly place embedded or near-substrate power delivery in roughly the ~3–5 A/mm² class, which is one reason many engineers view this approach as ideal in the long term.
Embedded IVR is widely viewed as the “holy grail” of power delivery. However, practical challenges are significant. At present, the incremental efficiency gains of embedded IVR over packaged IVR are often not large enough to justify the added complexity. Embedded IVR requires advanced substrate manufacturing, embedded passive integration, and sophisticated thermal solutions. Here, cooling becomes an issue because the power conversion circuitry is buried within the substrate, often requiring advanced approaches such as microchannel cooling.
What This Means for the Next Wave of AI Infrastructure
AI is pushing compute into a new era—but it is power delivery that will determine how far and how fast that progress can go.
No single architecture will solve this alone. Instead, the future of AI infrastructure will be built on layered, hybrid power delivery, where traditional VRMs provide flexible upstream conversion, package IVRs handle high-speed, high-current demands at the point of load, and embedded IVRs push integration and drive efficiency. Indeed, in the race to build the next generation of AI systems, the winners won’t just be those who can compute the most. They will be those who can deliver power to that compute most effectively.
